Renesas M16C/64A Series User Manual page 591

M16C/64A Group
25.3.1.3 Receiving a Slave Address in Wait Mode and Stop Mode
When the CM02 bit in the CM0 register is set to 0 (peripheral clock f1 does not stop in wait mode)
and transition is made to wait mode, the I
mode.
When the CM02 bit in the CM0 register is set to 1 (peripheral clock f1 stops in wait mode) and
transition is made to wait mode, the I
stop mode and low-power consumption mode.
The SCL/SDA interrupt can be used in either wait mode or stop mode.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
2
C interface can receive the slave address even in wait
2
C interface stops operating because fVIIC supply is stopped in
2
25. Multi-master I C-bus Interface
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