Memory Map - Freescale Semiconductor MPC850 User Manual

Chapter 2

Memory Map

Each memory resource in the MPC850 is mapped within a contiguous block of 16 Kbyte
memory. The location of this block within the global 4-Gbyte physical memory space can
be mapped on 64-Kbyte resolution through an implementation-specific special-purpose
register (SPR) called the internal memory map register (IMMR). See 10.4.1, "Internal
Memory Map Register (IMMR)." Table 2-1 defines the internal memory map.
Offset
000 SIUMCR—SIU module configuration register
004 SYPCR—System protection control register
008–00D Reserved
00E SWSR—Software service register
010 SIPEND—SIU interrupt pending register
014 SIMASK—SIU interrupt mask register
018 SIEL—SIU interrupt edge/level register
01C SIVEC—SIU interrupt vector register
020 TESR—Transfer error status register
024–02F Reserved
030 SDCR—SDMA configuration register
034–07F Reserved
080 PBR0—PCMCIA interface base register 0
084 POR0—PCMCIA interface option register 0
088 PBR1—PCMCIA interface base register 1
08C POR1—PCMCIA interface option register 1
090 PBR2—PCMCIA interface base register 2
094 POR2—PCMCIA interface option register 2
098 PBR3—PCMCIA interface base register 3
09C POR3—PCMCIA interface option register 3
Table 2-1. MPC850 Internal Memory Map
Name
General System Interface Unit
PCMCIA
Chapter 2. Memory Map
Size Section/Page
32 bits 10.4.2/-6
32 bits 10.4.3/-8
6 bytes —
16 bits 10.7.1/-22
32 bits 10.5.4.1/-15
32 bits 10.5.4.2/-17
32 bits 10.5.4.3/-18
32 bits 10.5.4.4/-19
32 bits 10.4.4/-9
12 bytes —
32 bits 19.2.1/-3
76 bytes —
32 bits 16.4.5/-12
32 bits 16.4.6/-12
32 bits 16.4.5/-12
32 bits 16.4.6/-12
32 bits 16.4.5/-12
32 bits 16.4.6/-12
32 bits 16.4.5/-12
32 bits 16.4.6/-12