Clocking And Power Management - Freescale Semiconductor MPC850 User Manual

1.2.3.2 Clocking and Power Management

The MPC850 clock system provides many different clocking options for all on-chip and
external devices. For its clock sources, the MPC850 contains phase-locked loop and crystal
oscillator support circuitry. The phase-locked loop circuitry can be used to provide a
high-frequency system clock from a low-frequency external source. Also, to enable flexible
power control, the MPC850 provides frequency dividers and a variety of low-power mode
options.
The MPC850 allows a system to optimize power utilization by providing performance
on-demand. This is implemented through a variety of programmable power-saving modes
with automatic wake-up features.
The main features of the MPC850 clocks and power control system are as follows:
• Contains system PLL (SPLL)
• Supports crystal oscillator circuits
• Clock dividers are provided for low-power modes and internal clocks
• Contains five major power-saving modes
— Normal (high and low)
— Doze (high and low)
— Sleep
— Deep sleep
— Power down
The MPC850 supports a wide range of power management features including full-high,
full-low, doze, sleep, deep-sleep, and low-power stop. These modes progressively reduce
power consumption, as follows:
• In full-high mode, the MPC850 is fully powered with all internal units operating at
the full processor speed.
• Full-low mode is the same as full-high, but operates at a lower frequency. A gear
mode determined by a clock divider allows the operating system to reduce the
operational frequency of the processor.
• Doze mode disables core functional units except the time base, decrementer, PLL,
memory controller, real-time clock, and places the CPM in low-power standby
mode.
• Sleep mode is the next lower power mode. It disables everything except the real-time
clock and periodic interrupt timer, leaving the PLL active for quick wake-up.
• Deep-sleep mode disables the PLL for lower power, but slower wake-up.
• Low-power stop disables all logic in the processor except the minimum logic
required to restart the device, and provides the lowest power consumption but
requires the longest wake-up time.
Chapter 1. Overview
Overview of Major Components