10.12.15 Adc Register Map; Table 49. Adc - Register Map And Reset Values - ST STM32F102 Series Reference Manual

Analog-to-digital converter (ADC)

10.12.15 ADC register map

The following table summarizes the ADC registers.
Table 49. ADC - register map and reset values
Offset Register
ADC_SR
0x00
Reset value
ADC_CR1
0x04
Reset value
ADC_CR2
0x08
Reset value
ADC_SMPR1
0x0C
Reset value 0
ADC_SMPR2
0x10
Reset value 0
ADC_JOFR1
0x14
Reset value
ADC_JOFR2
0x18
Reset value
ADC_JOFR3
0x1C
Reset value
ADC_JOFR4
0x20
Reset value
ADC_HTR
0x24
Reset value
ADC_LTR
0x28
Reset value
ADC_SQR1
0x2C
Reset value
ADC_SQR2
0x30
Reset value
ADC_SQR3
0x34
Reset value
ADC_JSQR
0x38
Reset value
182/690
Reserved
0 0
Reserved
0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
L[3:0]
Reserved
0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Reserved
Reserved
DUALMOD DISC
[3:0] NUM [2:0]
0 0 0 0 0 0
EXTSEL JEXTSEL
[2:0] [2:0]
0 0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0
JL[1:0] Injected channel sequence JSQx_x bits
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Reserved
0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
JOFFSET1[11:0]
0 0 0 0 0 0 0
JOFFSET2[11:0]
0 0 0 0 0 0 0
JOFFSET3[11:0]
0 0 0 0 0 0 0
JOFFSET4[11:0]
0 0 0 0 0 0 0
HT[11:0]
0 0 0 0 0 0 0
LT[11:0]
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
RM0008
0 0 0 0 0
AWDCH[4:0]
0 0 0 0 0
0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0