ST STM32F102 Series Reference Manual page 685

RM0008
Table 174. Document revision history (continued)
Date
22-May-2008
continued
Revision
Figure 204: CAN frames on page 516
modified in TX mailbox identifier register (CAN_TIxR) (x=0..2) on page
Bits 31:21 and bits 20:3 modified in
(CAN_RIxR) (x=0..1) on page
Section 23.3.7: DMA requests on page 593
description modified in
page 599.
Clock phase and clock polarity on page 548
page 550 modified.
sequence on page 567
modified.
4
2
I S feature added (see
continued
page 543).
In Section 26: Debug support (DBG) on page
– DBGMCU_IDCODE on page 659
updated
– TMC TAP changed to boundary scan TAP
– Address onto which DBGMCU_CR is mapped modified in
Section 26.15.3: Debug MCU configuration register on page
Section 25: Device electronic signature on page 650
REV_ID(15:0) definition modified in
page 659.
Changes
modified. Bits 31:21 and bits 20:3
Rx FIFO mailbox identifier register
531.
Section 23.6.2: Control register 2 (I2C_CR2) on
Receive sequence on page 551
modified. Underrun flag (UDR) on page 568
Section 22: Serial peripheral interface (SPI) on
and DBGMCU_CR on page 671
Section 26.6.1: MCU device ID code on
Revision history
modified. DMAEN bit 11
modified. Transmit sequence on
added. Reception
653:
671.
added.
529.
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