Alternate Function I/O And Debug Configuration (Afio); Using Osc32_In/Osc32_Out Pins As Gpio Ports Pc14/Pc15; Using Osc_In/Osc_Out Pins As Gpio Ports Pd0/Pd1; Bxcan Alternate Function Remapping - ST STM32F102 Series Reference Manual

General-purpose and alternate-function I/Os (GPIOs and AFIOs)
7.3

Alternate function I/O and debug configuration (AFIO)

To optimize the number of peripherals available for the 64-pin or the 100-pin or the 144-pin
package, it is possible to remap some alternate functions to some other pins. This is
achieved by software, by programming the
(AFIO_MAPR) on page
their original assignations.
7.3.1

Using OSC32_IN/OSC32_OUT pins as GPIO ports PC14/PC15

The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general-purpose I/O
PC14 and PC15, respectively, when the LSE oscillator is off. The LSE has priority over the
GP IOs function.
Note: 1 The PC14/PC15 GPIO functionality is lost when the 1.8 V domain is powered off (by
entering standby mode) or when the backup domain is supplied by V
supplied). In this case the IOs are set in analog input mode.
2 Refer to the note on IO usage restrictions in
7.3.2

Using OSC_IN/OSC_OUT pins as GPIO ports PD0/PD1

The HSE oscillator pins OSC_IN/OSC_OUT can be used as general-purpose I/O PD0/PD1
by programming the PD01_REMAP bit in the
(AFIO_MAPR).
This remap is available only on 36-, 48- and 64-pin packages (PD0 and PD1 are available
on 100-pin and 144-pin packages, no need for remapping).
Note: The external interrupt/event function is not remapped. PD0 and PD1 cannot be used for
external interrupt/event generation on 36-, 48- and 64-pin packages.
7.3.3

BXCAN alternate function remapping

The BXCAN signal can be mapped on Port A, Port B or Port D as shown in
port D, remapping is not possible in devices delivered in 36-, 48- and 64-pin packages.
Table 17.
Alternate function
CANRX
CANTX
1. Remap not available on 36-pin package
2. This remapping is available only on 100-pin and 144-pin packages, when PD0 and PD1 are not remapped
on OSC-IN and OSC-OUT.
7.3.4

JTAG/SWD alternate function remapping

The debug interface signals are mapped on the GPIO ports as shown in
110/690
117. In this case, the alternate functions are no longer mapped to
BXCAN alternate function remapping
CAN_REMAP[1:0] =
"00"
PA11
PA12
AF remap and debug I/O configuration register
Section 4.1.2 on page
AF remap and debug I/O configuration register
CAN_REMAP[1:0] =
(1)
"10"
PB8
PB9
RM0008
(V no more
BAT DD
49.
Table 17. For
CAN_REMAP[1:0] =
(2)
"11"
PD0
PD1
Table 18.