Boundary Scan Tap; Cortex-M3 Tap; Cortex-M3 Jedec-106 Id Code - ST STM32F102 Series Reference Manual

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Debug support (DBG)
Bits 31:16 REV_ID(15:0) Revision identifier
This field indicates the revision of the device:
In low-density devices:
In medium-density devices:
In high-density devices:
Bits 27:12
Reserved
Bits 11:0 DEV_ID(11:0): Device identifier
This field indicates the device ID.
For low-density devices, the device ID is 0x412
For medium-density devices, the device ID is 0x410
For high-density devices, the device ID is 0x414
26.6.2

Boundary scan TAP

JTAG ID code
The TAP of the STM32F10xxx BSC (boundary scan) integrates a JTAG ID code equal to:
In low-density devices:
In medium-density devices:
In high-density devices:
26.6.3

Cortex-M3 TAP

The TAP of the ARM Cortex-M3 integrates a JTAG ID code. This ID code is the ARM default
one and has not been modified. This code is only accessible by the JTAG Debug Port.
This code is 0x3BA00477 (corresponds to Cortex-M3 r1p1)
Only the DEV_ID(15:0) should be used for identification by the debugger/programmer tools.
26.6.4

Cortex-M3 JEDEC-106 ID code

The ARM Cortex-M3 integrates a JEDEC-106 ID code. It is located in the 4KB ROM table
mapped on the internal PPB bus at address 0xE00FF000_0xE00FFFFF.
This code is accessible by the JTAG Debug Port (4 to 5 pins) or by the SW Debug Port (two
pins) or by the user software.
660/690
0x1000 = Revision A
0x0000 = Revision A
0x2000 = Revision B
0x2001 = Revision Z
0x2003 = Revision Y
0x1000 = Revision A
0x1001 = Revision Z
0x06412041 = Revision A
0x06410041 = Revision A
0x16410041 = Revision B and Revision Z
0x06414041 = Revision A
RM0008

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