Table 78. Fsmc_Tcrx Bit Fields; Table 79. Fsmc_Bwtrx Bit Fields - ST STM32F102 Series Reference Manual

Flexible static memory controller (FSMC)
Table 78.
Bit
number
31-30
29-28
27-16
15-8
7-4
3-0
Table 79.
Bit
number
31-30
29-28
27-16
15-8
7-4
3-0
378/690
FSMC_TCRx bit fields
Bit name
0x0
ACCMOD 0x0
0x000
Duration of the second access phase (DATAST+3 HCLK cycles) in
DATAST
read. This value cannot be 0 (minimum is 1)
0x0
ADDSET Duration of the first access phase (ADDSET+1 HCLK cycles) in read.
FSMC_BWTRx bit fields
Bit name
0x0
ACCMOD 0x0
0x000
Duration of the second access phase (DATAST+1 HCLK cycles) in
DATAST
write. This value cannot be 0 (minimum is 1)
0x0
ADDSET Duration of the first access phase (ADDSET+1 HCLK cycles) in write.
Value to set
Value to set
RM0008