Table 80. Fsmc_Bcrx Bit Fields; Figure 165. Modeb Write Accesses - ST STM32F102 Series Reference Manual

Flexible static memory controller (FSMC)

Figure 165. ModeB write accesses

The differences with mode1 are the toggling of NADV and the independent read and write
timings when extended mode is set (Mode B).
Table 80.
Bit
number
31-15
14
13-10
9
8
7
6
5-4
3-2
1
0
380/690
A[25:0]
NADV
NEx
NOE
NWE
D[15:0]
(ADDSET +1)
HCLK cycles
FSMC_BCRx bit fields
Bit name
0x0000
EXTMOD 0x1 for mode B, 0x0 for mode 2
0x0
WAITPOL Meaningful only if bit 15 is 1.
BURSTEN 0x0
-
FACCEN Set according to memory support
MWID As needed
MTYP 10 (NOR Flash).
MUXEN 0x0
MBKEN 0x1
Memory transaction
1HCLK
data driven by FSMC
(DATAST + 1)
HCLK cycles
Value to set
RM0008
ai15110b