Figure 217. Msb Justified 16-Bit Or 32-Bit Full-Accuracy Length With Cpol = 0; Figure 218. Msb Justified 24-Bit Frame Length With Cpol = 0; Figure 219. Msb Justified 16-Bit Extended To 32-Bit Packet Frame With Cpol = 0 - ST STM32F102 Series Reference Manual

Serial peripheral interface (SPI)
MSB justified standard
For this standard, the WS signal is generated at the same time as the first data bit, which is
the MSBit.

Figure 217. MSB Justified 16-bit or 32-bit full-accuracy length with CPOL = 0

CK
WS
SD
Data are latched on the falling edge of CK (for transmitter) and are read on the rising edge
(for the receiver).

Figure 218. MSB Justified 24-bit frame length with CPOL = 0

CK
WS
SD

Figure 219. MSB Justified 16-bit extended to 32-bit packet frame with CPOL = 0

CK
WS
SD
560/690
Transmission
Reception
May be 16-bit, 32-bit
MSB
Channel left
Transmission
24-bit data
MSB
LSB
Channel left 32-bit
Transmission
16-bit data
MSB
LSB
Channel left 32-bit
LSB MSB
Reception
8-bit remaining
0 forced
Reception
16-bit remaining
0 forced
RM0008
Channel right
Channel right
Channel right