Continuous Communication Using Dma; Figure 252. Irda Sir Endec- Block Diagram; Figure 253. Irda Data Modulation (3/16) -Normal Mode - ST STM32F102 Series Reference Manual

RM0008
Receiver:
Receiving in low-power mode is similar to receiving in normal mode. For glitch detection the
USART should discard pulses of duration shorter than 1/PSC. A valid low is accepted only if
its duration is greater than 2 periods of the IrDA low-power Baud clock (PSC value in
USART_GTPR).
Note: 1 A pulse of width less than two and greater than one PSC period(s) may or may not be
rejected.
2 The receiver set up time should be managed by software. The IrDA physical layer
specification specifies a minimum of 10 ms delay between transmission and reception (IrDA
is a half duplex protocol).

Figure 252. IrDA SIR ENDEC- block diagram

Figure 253. IrDA data modulation (3/16) -Normal Mode

TX
IrDA_OUT
IrDA_IN
RX
24.3.12

Continuous communication using DMA

The USART is capable to continue communication using the DMA. The DMA requests for
Rx buffer and Tx buffer are generated independently.
Note: You should refer to product specs for availability of the DMA controller. If DMA is not
available in the product, you should use the USART as explained in
24.3.3. In the USART_SR register, you can clear the TXE/ RXNE flags to achieve
continuous communication.
Universal synchronous asynchronous receiver transmitter (USART)
TX
SIREN
USART
RX
Start
bit
0
0
1
bit period
0
1
0
SIR
Transmit
Encoder
SIR
Receive
Decoder
0
0
1
0
0
1
USART_TX
OR
IrDA_OUT
IrDA_IN
USART_RX
stop bit
0
1 1
1
3/16
0
1
1
Section 24.3.2
1
or
633/690