Asynchronous Mode; Traceclkin Connection Inside Stm32F10Xxx; Tpiu Registers; Table 172. Important Tpiu Registers - ST STM32F102 Series Reference Manual

RM0008
The TRACE I/Os (including TRACECK) are driven by the rising edge of TRACLKIN (equal to
HCLK). Consequently, the output frequency of TRACECK is equal to HCLK/2.
26.16.7

Asynchronous mode

This is a low cost alternative to output the trace using only 1 pin: this is the asynchronous
output pin TRACESWO. Obviously there is a limited bandwidth.
TRACESWO is multiplexed with JTDO when using the SW-DP pin. This way, this
functionality is available in all STM32F10xxx packages.
This asynchronous mode requires a constant frequency for TRACECLKIN. For the standard
UART (NRZ) capture mechanism, 5% accuracy is needed. The Manchester encoded
version is tolerant up to 10%.
26.16.8

TRACECLKIN connection inside STM32F10xxx

In STM32F10xxx, this TRACECLKIN input is internally connected to HCLK. This means that
when in asynchronous trace mode, the application is restricted to use to time frames where
the CPU frequency is stable.
Note: Important: when using asynchronous trace: it is important to be aware that:
The default clock of the STM32F10xxx MCU is the internal RC oscillator. Its frequency
under reset is different from the one after reset release. This is because the RC calibration is
the default one under system reset and is updated at each system reset release.
Consequently, the Trace Port Analyzer (TPA) should not enable the trace (with the bit
IOTRACEN) under system reset, because a Synchronization Frame Packet will be issued
with a different bit time than trace packets which will be transmitted after reset release.
26.16.9

TPIU registers

The TPIU APB registers can be read and written only if the bit TRCENA of the Debug
Exception and Monitor Control Register (DEMCR) is set. Otherwise, the registers are read
as zero (the output of this bit enables the PCLK of the TPIU).

Table 172. Important TPIU registers

Address
0xE0040004 Current port size
0xE00400F0
Register
Allows the trace port size to be selected:
Bit 0: Port size = 1
Bit 1: Port size = 2
Bit 2: Port size = 3, not supported
Bit 3: Port Size = 4
Only 1 bit must be set. By default, the port size is one bit.
(0x00000001)
Allows the Trace Port Protocol to be selected:
Bit1:0=
Selected pin
00: Sync Trace Port Mode
protocol
01: Serial Wire Output - manchester (default value)
10: Serial Wire Output - NRZ
11: reserved
Debug support (DBG)
Description
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