ST STM32F102 Series Reference Manual page 95

RM0008
Bit 28 SFTRSTF Software Reset flag
Reset by software by writing the RMVF bit.
Set by hardware when a software reset occurs.
0: No software reset occurred
1: Software reset occurred
Bit 27 PORRSTF POR/PDR reset flag
Reset by software by writing the RMVF bit.
Set by hardware when a POR/PDR reset occurs.
0: No POR/PDR reset occurred
1: POR/PDR reset occurred
Bit 26 PINRSTF PIN reset flag
Reset by software by writing the RMVF bit.
Set by hardware when a reset from the NRST pin occurs.
0: No reset from NRST pin occurred
1: Reset from NRST pin occurred
Bit 25 Reserved, always read as 0.
Bit 24 RMVF Remove reset flag
Set and reset by software to reset the value of the reset flags.
0: Reset of the reset flags not activated
1: Reset the value of the reset flags
Bits 23:2 Reserved, always read as 0.
Bit 1 LSIRDY Internal Low Speed oscillator Ready
Set and reset by hardware to indicate when the internal RC 40 kHz oscillator is stable. This bit
needs 3 cycles of internal RC 40 kHz oscillator to fall down after LSION reset.
0: Internal RC 40 kHz oscillator not ready
1: Internal RC 40 kHz oscillator ready
Bit 0 LSION Internal Low Speed oscillator enable
Set and reset by software.
0: Internal RC 40 kHz oscillator OFF
1: Internal RC 40 kHz oscillator ON
Reset and clock control (RCC)
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