RM0008
Table 81.
Bit number
31-30
29-28
27-16
15-8
7-4
3-0
Table 82.
Bit
number
31-30
29-28
27-16
15-8
7-4
3-0
Note:
The FSMC_BWTRx register is valid only if extended mode is set (mode B), otherwise all its
content is don't care.
FSMC_TCRx bit fields
Bit name
0x0
ACCMOD
0x1 if extended mode is set
0x000
Duration of the access second phase (DATAST+3 HCLK cycles) in
DATAST
read. This value can not be 0 (minimum is 1)
0x0
Duration of the access first phase (ADDSET+1 HCLK cycles) in
ADDSET
read.
FSMC_BWTRx bit fields
Bit name
0x0
ACCMOD
0x1 if extended mode is set
0x000
Duration of the access second phase (DATAST+1 HCLK cycles) in
DATAST
write. This value can not be 0 (minimum is 1)
0x0
Duration of the access first phase (ADDSET+1 HCLK cycles) in
ADDSET
write.
Flexible static memory controller (FSMC)
Value to set
Value to set
381/690
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