Adc Watchdog High Threshold Register (Adc_Htr); Adc Watchdog Low Threshold Register (Adc_Ltr) - ST STM32F102 Series Reference Manual

RM0008
10.12.7

ADC watchdog high threshold register (ADC_HTR)

Address offset: 0x24
Reset value: 0x0000 0000
31 30 29 28
15 14 13 12
Reserved
Res.
Bits 31:12 Reserved, must be kept cleared.
Bits 11:0 HT[11:0] Analog watchdog high threshold
These bits are written by software to define the high threshold for the Analog Watchdog.
10.12.8

ADC watchdog low threshold register (ADC_LTR)

Address offset: 0x28
Reset value: 0x0000 0000
31 30 29 28
15 14 13 12
Reserved
Res
Bits 31:12 Reserved, must be kept cleared.
Bits 11:0 LT[11:0] Analog watchdog low threshold
These bits are written by software to define the low threshold for the Analog Watchdog.
27 26 25 24
Reserved
11 10 9 8
rw rw rw rw
27 26 25 24
Reserved
11 10 9 8
rw rw rw rw
Analog-to-digital converter (ADC)
23 22 21 20
7 6 5 4
HT[11:0]
rw rw rw rw
23 22 21 20
7 6 5 4
LT[11:0]
rw rw rw rw
19 18 17 16
3 2 1 0
rw rw rw rw
19 18 17 16
3 2 1 0
rw rw rw rw
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