RM0008
Figure 95. General-purpose timer block diagram
TIMx_ETR
TIMx_CH1
TIMx_CH2
TIMx_CH3
TIMx_CH4
13.3
TIMx functional description
13.3.1
Time-base unit
The main block of the programmable timer is a 16-bit counter with its related auto-reload
register. The counter can count up, down or both up and down. The counter clock can be
divided by a prescaler.
The counter, the auto-reload register and the prescaler register can be written or read by
software. This is true even when the counter is running.
The time-base unit includes:
●
Counter Register (TIMx_CNT)
●
Prescaler Register (TIMx_PSC):
●
Auto-Reload Register (TIMx_ARR)
Internal Clock (CK_INT)
TIMxCLK from RCC
ETR
ITR0
ITR1
ITR2
ITR3
TI1FP1
TI1
XOR
Input Filter &
TI1FP2
Edge Detector
TRC
TI2FP1
TI2
Input Filter &
TI2FP2
Edge Detector
TRC
TI3FP3
TI3
Input Filter &
TI3FP4
Edge Detector
TRC
TI4FP3
TI4
Input Filter &
TI4FP4
Edge Detector
TRC
ETRP
Polarity Selection & Edge
Input Filter
Detector & Prescaler
ITR
TRC
TI1F_ED
TI1FP1
TI2FP2
U
Stop, Clear
PSC
CK_PSC
CK_CNT
+/-
Prescaler
CC1I
IC1
U
IC1PS
Prescaler
CC2I
IC2
U
IC2PS
Prescaler
CC3I
U
IC3
IC3PS
Prescaler
Capture/Compare 3 Register
CC4I
U
IC4
IC4PS
Prescaler
Capture/Compare 4 Register
Notes:
Reg
General-purpose timer (TIMx)
ETRF
TRGO
Trigger
TGI
to other timers
Controller
to DAC/ADC
TRGI
Slave
Reset, Enable, Up/Down, Count,
Mode
Controller
Encoder
Interface
AutoReload Register
UI
Up/Down
or
U
CNT
COUNTER
CC1I
output
OC1REF
Capture/Compare 1 Register
control
CC2I
output
OC2REF
Capture/Compare 2 Register
control
CC3I
output
OC3REF
control
CC4I
output
OC4REF
control
ETRF
Preload registers transferred
to active registers on U event
according to control bit
event
interrupt & DMA output
OC1
TIMx_CH1
OC2
TIMx_CH2
OC3
TIMx_CH3
OC4
TIMx_CH4
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