Rtc Register Map; Table 62. Rtc - Register Map And Reset Values - ST STM32F102 Series Reference Manual

RM0008
15.4.7

RTC register map

RTC registers are mapped as 16-bit addressable registers as described in the table below:
RTC
Table 62. - register map and reset values
Offset Register
RTC_CRH
0x000
Reset value
RTC_CRL
0x004
Reset value
RTC_PRLH
0x008
Reset value
RTC_PRLL
0x00C
Reset value
RTC_DIVH
0x010
Reset value
RTC_DIVL
0x014
Reset value
0x018 RTC_CNTH
Reset value
RTC_CNTL
0x01C
Reset value
RTC_ALRH
0x020
Reset value
RTC_ALRL
0x024
Reset value
Refer to
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Table 1 on page 36 for the register boundary addresses.
Reserved
Reserved
Reserved
1 0 0 0
0 0 0 0
1 0 0 0
0 0 0 0
0 0 0 0
1 1 1 1
1 1 1 1
Real-time clock (RTC)
1 0 0
0
PRL[15:0]
0 0 0 0 0 0 0 0 0
DIV[31:16]
0 0 0 0 0 0 0 0 0
DIV[15:0]
0 0 0 0 0 0 0 0 0
CNT[13:16]
0 0 0 0 0 0 0 0 0
CNT[15:0]
0 0 0 0 0 0 0 0 0
ALR[31:16]
1 1 1 1 1 1 1 1 1
ALR[15:0]
1 1 1 1 1 1 1 1 1
0 0 0
0 0 0
PRL[19:16]
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
1 1 1
1 1 1
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