Table 93. Fsmc_Bcrx Bit Fields; Table 94. Fsmc_Tcrx Bit Fields - ST STM32F102 Series Reference Manual

Flexible static memory controller (FSMC)
Table 93.
Bit No.
31-20
19
18-15
14
13
12
11
10
9
8
7
6
5-4
3-2
1
0
Table 94.
Bit No.
31-30
27-24
23-20
19-16
15-8
7-4
3-0
392/690
FSMC_BCRx bit fields
Bit name
0x0000
CBURSTRW 0x1
0x0
EXTMOD 0x0
When high, the first data after latency period is taken as always
WAITEN
valid, regardless of the wait from memory value
WREN no effect on synchronous read
WAITCFG 0x0
WRAPMOD to be set according to memory
WAITPOL to be set according to memory
BURSTEN no effect on synchronous write
FWPRLVL Set to protect memory from accidental writes
FACCEN Set according to memory support
MWID As needed
MTYP 01 or 11
MUXEN As needed
MBKEN 0x1
FSMC_TCRx bit fields
Bit name
- 0x0
DATLAT Data latency
0 to get CLK = HCLK (not supported)
CLKDIV
1 to get CLK = 2 × HCLK
BUSTURN No effect
DATAST No effect
ADDHLD No effect
ADDSET No effect
Value to set
Value to set
RM0008