ST STM32F102 Series Reference Manual page 148

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DMA controller (DMA)
Table 41.
DMA - register map and reset values (continued)
Offset
Register
DMA_CCR6
0x06C
Reset value
DMA_CNDTR6
0x070
Reset value
DMA_CPAR6
0x074
Reset value
0
DMA_CMAR6
0x078
Reset value
0
0x07C
DMA_CCR7
0x080
Reset value
DMA_CNDTR7
0x084
Reset value
DMA_CPAR7
0x088
Reset value
0
DMA_CMAR7
0x08C
Reset value
0
0x090
Refer to
148/690
Reserved
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 1 on page 36
for the register boundary addresses.
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
M
PL
PSIZE
SIZE
[1:0]
[1:0]
[1:0]
0
0
0
0
0
0
0
0
0
NDT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
M
PL
PSIZE
SIZE
[1:0]
[1:0]
[1:0]
0
0
0
0
0
0
0
0
0
NDT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RM0008
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

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