Figure 95. General-Purpose Timer Block Diagram - ST STM32F102 Series Reference Manual

Revision history
Table 174. Document revision history (continued)
Date
22-May-2008
continued
684/690
Revision
In Section 6: Reset and clock control (RCC) on page
– LSI calibration on page 74
– Figure 7: Reset circuit on page 70
– APB2 peripheral reset register (RCC_APB2RSTR) on page 83
– APB1 peripheral reset register (RCC_APB1RSTR) on page 85
– AHB Peripheral Clock enable register (RCC_AHBENR)
– APB2 peripheral clock enable register (RCC_APB2ENR)
– APB1 peripheral clock enable register (RCC_APB1ENR) on page 90
updated (see
– LSERDYIE definition modified in
– HSITRIM[4:0] definition modified in
In Section 7: General-purpose and alternate-function I/Os (GPIOs and
AFIOs) on page
– GPIO ports F and G added
– In Section 7.3: Alternate function I/O and debug configuration (AFIO) on
page 110 remapping for High-density devices added, note modified under
Section 7.3.2,
– AF remap and debug I/O configuration register (AFIO_MAPR) on
page 117 updated
Updated in Section 8: Interrupts and events on page
– number of maskable interrupt channels
– number of GPIOs (see
In Section 9: DMA controller (DMA) on page
4
– number of DMA controllers and configurable DMA channels updated
continued
– Figure 18: DMA block diagram on page 135
– Note updated in
– Note updated in
– Figure 19: DMA1 request mapping on page 139
– DMA2 controller on page 140
In Section 10: Analog-to-digital converter (ADC) on page
– ADC3 added
Table 47: External trigger for injected channels for ADC3 on page 159
added, etc.)
Section 11: Digital-to-analog converter (DAC) on page 184
In Section 12: Advanced-control timers (TIM1&TIM8) on page
– Advanced control timer TIM8 added (see
timer block diagram on page
– TS[2:0] modified in
(TIMx_SMCR) on page
In Section 13: General-purpose timer (TIMx) on page
– TIM5 added
– Figure 95: General-purpose timer block diagram on page 275
Table 58: TIMx Internal trigger connection on page 314
Section 14: Basic timer (TIM6&7) on page 330
RTC clock sources specified in
page 343. Section 15.1: RTC introduction
Section 18: Flexible static memory controller (FSMC) on page 365
Section 19: SDIO interface (SDIO) on page 412
Changes
added
updated
Section Table 14.: RCC - register map and reset
Clock interrupt register (RCC_CIR)
Clock control register (RCC_CR)
97:
Section 7.3.3 on page 110
Figure 17: External interrupt/event GPIO
Section 9.3.2: Arbiter on page 136
Section 9.3.5: Interrupts on page 138
added
(Figure 21: Single ADC block diagram on page 150
208)
Section 12.4.3: Slave mode control register
250.
Section 15.2: RTC main features on
69:
updated
updated
updated
updated
values).
modified
123:
134:
updated, notes added
updated
149:
added.
206:
Figure 47: Advanced-control
273:
updated.
modified.
added.
modified.
added.
RM0008
mapping)
updated,
added.