Sdio Data Control Register (Sdio_Dctrl) - ST STM32F102 Series Reference Manual

SDIO interface (SDIO)
19.9.9

SDIO Data Control Register (SDIO_DCTRL)

Address offset: 0x2C
Reset value: 0x0000 0000
The SDIO_DCTRL register control the data path state machine (DPSM).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:12 Reserved, always read as 0.
Bit 11 SDIOEN: SD I/O enable functions.
If this bit is set, the DPSM performs an SD I/O-card-specific operation.
Bit 10 RWMOD: Read wait mode
0: Read Wait control stopping SDIO_CK
1: Read Wait control using SDIO_D2
Bit 9 RWSTOP: Read wait stop
0: Read wait in progress if RWSTART bit is set
1: Enable for read wait stop if RWSTART bit is set
Bit 8 RWSTART: Read wait start.
If this bit is set, read wait operation starts.
Bits 7:4 DBLOCKSIZE: Data block size.
Define the data block length when the block data transfer mode is selected:
0000: (0 decimal) lock length = 2
0001: (1 decimal) lock length = 2
0010: (2 decimal) lock length = 2
0011: (3 decimal) lock length = 2
0100: (4 decimal) lock length = 2
0101: (5 decimal) lock length = 2
0110: (6 decimal) lock length = 2
0111: (7 decimal) lock length = 2
1000: (8 decimal) lock length = 2
1001: (9 decimal) lock length = 2
1010: (10 decimal) lock length = 2
1011: (11 decimal) lock length = 2
1100: (12 decimal) lock length = 2
1101: (13 decimal) lock length = 2
1110: (14 decimal) lock length = 2
1111: (15 decimal) reserved
Bit 3 DMAEN: DMA enable bit
0: DMA disabled.
1: DMA enabled.
458/690
Reserved
Res.
0
= 1 byte
1
= 2 bytes
2
= 4 bytes
3
= 8 bytes
4
= 16 bytes
5
= 32 bytes
6
= 64 bytes
7
= 128 bytes
8
= 256 bytes
9
= 512 bytes
10
= 1024 bytes
11
= 2048 bytes
12
= 4096 bytes
13
= 8192 bytes
14
= 16384 bytes
9 8 7 6 5
r/w r/w r/w r/w r/w
RM0008
4 3 2 1 0
r/w r/w r/w r/w