Figure 70. Control Circuit In External Clock Mode 1 - ST STM32F102 Series Reference Manual

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For example, to configure the upcounter to count in response to a rising edge on the TI2

input, use the following procedure:

Configure channel 2 to detect rising edges on the TI2 input by writing CC2S = '01' in

the TIMx_CCMR1 register.

Configure the input filter duration by writing the IC2F[3:0] bits in the TIMx_CCMR1

Select rising edge polarity by writing CC2P=0 in the TIMx_CCER register.

Configure the timer in external clock mode 1 by writing SMS=111 in the TIMx_SMCR

Select TI2 as the trigger input source by writing TS=110 in the TIMx_SMCR register.

Enable the counter by writing CEN=1 in the TIMx_CR1 register.

The capture prescaler is not used for triggering, so you don't need to configure it.

When a rising edge occurs on TI2, the counter counts once and the TIF flag is set.

The delay between the rising edge on TI2 and the actual clock of the counter is due to the

resynchronization circuit on TI2 input.

Figure 70. Control circuit in external clock mode 1

External clock source mode 2

This mode is selected by writing ECE=1 in the TIMx_SMCR register.

The counter can count at each rising or falling edge on the external trigger input ETR.

Figure 71. External trigger input block

Counter clock = CK_CNT = CK_PSC

Counter register

gives an overview of the external trigger input block.

/1, /2, /4, /8

Advanced-control timers (TIM1&TIM8)

external clock

external clock

internal clock

(internal clock)

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