Figure 257. Usart Interrupt Mapping Diagram - ST STM32F102 Series Reference Manual

Revision history
Table 174. Document revision history (continued)
Date
28-Jul-2008
686/690
Revision
Developed polynomial form updated in
page 44.
Figure 4: Power supply overview on page 48
Section 4.1.2: Battery backup domain on page 49
Section 6.2.5: LSI clock on page 74
Section 7.1.4: Alternate functions (AF) on page 100
Note added to
Bits are write-only in
(DMA_IFCR) on page
Register name modified in
Recommended sampling time given in
on page 167.
Bit attributes modified in
page 169.
Note modified for bits 23:0 in
5
(ADC_SMPR1) on page
Note added in
Formula updated in
DBL[4:0] description modified in
synchronization on page
Figure 77 on page 226
Section 22.5.3: SPI status register (SPI_SR) on page 573
Closing the communication on page 588
Notes added to
page 606. TCK replaced by T
OVR changed to ORE in
page 637.
Section 24.6.1: Status register (USART_SR) on page 638
Slave select (NSS) pin management on page 547
Small text changes.
Changes
specified.
Table 27: Timer 2 alternate function remapping on page
Section 9.4.2: DMA interrupt flag clear register
143.
Section 10.3.1: ADC on-off control on page
Section 10.12.1: ADC status register (ADC_SR) on
Section 10.12.4: ADC sample time register 1
175.
Section 11.2: DAC main features on page
Section 11.3.5: DAC output voltage on page
Section 12.3.19: TIMx and external trigger
243.
and Figure 123 on page 291
Section 23.6.8: Clock control register (I2C_CCR) on
in Section 23.6.8
PCLK1
Figure 257: USART interrupt mapping diagram on
Section 3.2: CRC main features on
modified.
modified.
clarified.
Section 10.10: Temperature sensor
184.
modified.
modified.
updated.
and Section
updated.
clarified.
RM0008
113.
151.
188.
23.6.9.