Inter-Integrated Circuit (I 2 C) Interface; Introduction; I 2 C Main Features - ST STM32F102 Series Reference Manual

Inter-integrated circuit (I
23 Inter-integrated circuit (I
Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
High-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 256 and 512 Kbytes.
This section applies to the whole STM32F10xxx family, unless otherwise specified.
23.1

Introduction

2
I C (inter-integrated circuit) bus Interface serves as an interface between the microcontroller
and the serial I
sequencing, protocol, arbitration and timing. It supports standard and fast speed modes. It is
also SMBus 2.0 compatible.
It may be used for a variety of purposes, including CRC generation and verification, SMBus
(system management bus) and PMBus (power management bus).
Depending on specific device implementation DMA capability can be available for reduced
CPU overload.
2
23.2 I C main features
●
Parallel-bus/I
●
Multimaster capability: the same interface can act as Master or Slave
2
●
I C Master features:
–
–
2
●
I C Slave features:
–
–
–
●
Generation and detection of 7-bit/10-bit addressing and General Call
●
Supports different communication speeds:
–
–
●
Status flags:
–
–
–
●
Error flags:
–
580/690
2
C) interface
2
C bus. It provides multimaster capability, and controls all I
2
C protocol converter
Clock generation
Start and Stop generation
2
Programmable I C Address detection
Dual Addressing Capability to acknowledge 2 slave addresses
Stop bit detection
Standard Speed (up to 100 kHz),
Fast Speed (up to 400 kHz)
Transmitter/Receiver mode flag
End-of-Byte transmission flag
2
I C busy flag
Arbitration lost condition for master mode
2
C) interface
RM0008
2
C bus-specific