Figure 211. I 2 S Phillips Protocol Waveforms (16/32-Bit Full Accuracy, Cpol = 0); Figure 212. I 2 S Phillips Standard Waveforms (24-Bit Frame With Cpol = 0); Figure 213. Transmitting 0X8Eaa33 - ST STM32F102 Series Reference Manual

Serial peripheral interface (SPI)
Figure 211. I
CK
WS
SD
Data are latched on the falling edge of CK (for the transmitter) and are read on the rising
edge (for the receiver). The WS signal is also latched on the falling edge of CK.
Figure 212. I
CK
WS
SD
This mode needs two write or read operations to/from the SPI_DR.
●
In transmission mode:
if 0x8EAA33 has to be sent (24-bit):

Figure 213. Transmitting 0x8EAA33

First write to Data register
558/690
2
S Phillips protocol waveforms (16/32-bit full accuracy, CPOL = 0)
Transmission
May be 16-bit, 32-bit
MSB
Channel left
2
S Phillips standard waveforms (24-bit frame with CPOL = 0)
Transmission
24-bit data
MSB
Channel left 32-bit
0x8EAA
Reception
Reception
8-bit remaining
0 forced
LSB
Second write to Data register
0x33XX
Only the 8 MSBs are sent to complete the 24 bits
8 LSB bits have no meaning and could be
anything
RM0008
LSB MSB
Channel right
Channel right