D.1
Port States in Each Mode
Table D-1
I/O Port States in Each Processing State
MCU
Port Name
Operating
Pin Name
Mode
P17/TIOCB2/
4 to 7
TCLKD
P16/TIOCA2
P15/TIOCB1/
TCLKC
P14/TIOCA1
P13/TIOGD0/
4 to 6
TCLKB/A23
P12/TIOCC0/T
CLKA/A22
P11/TIOCB0/
A21
P10/TIOCA0/
A20
7
Port 2
4 to 7
Port 3
4 to 7
P47/DA1
4 to 7
P46/DA0
4 to 7
P45 to P40
4 to 7
Rev. 5.00, 12/03, page 1078 of 1088
Appendix D Pin States
Hardware
Standby
Software
Reset
Mode
Standby Mode
T
T
kept
T
T
[AnE = 0]
kept
[AnE · DDR = 1]
kept
[AnE · DDR · OPE
= 1]
T
[AnE · DDR · OPE
= 1]
kept
T
T
kept
T
T
kept
T
T
kept
T
T
[DAOE1 = 1]
kept
[DAOE1 = 0]
T
T
T
[DAOE0 = 1]
kept
[DAOE0 = 0]
T
T
T
T
Program
Bus-Released
Execution State
State
Sleep Mode
kept
I/O port
[AnE = 0]
[AnE = 0]
kept
I/O port
[AnE · DDR = 1]
[AnE · DDR = 1]
kept
I/O port
[AnE · DDR = 1]
[AnE · DDR = 1]
T
Address output
kept
I/O port
kept
I/O port
kept
I/O port
kept
I/O port
kept
I/O port
T
Input port