Samsung S5PC100 User Manual page 1147

CAMERA INTERFACE
8.18 Output DMA Control Register (CIOCTRLn)
CIOCTRL0, R/W, Address = 0xEE20_004C
CIOCTRL1, R/W, Address = 0xEE30_004C
CIOCTRL2, R/W, Address = 0xEE40_004C
CIOCTRLn
Reserved [31:26]
Order2p_out [25:24]
Reserved [23:4]
C_INT_OUT
LastIRQEn
Order422_out [1:0]
YCbCr : 3 plane
9.3-32
Bit
Reserved
YCbCr 4:2:0 or 4:2:2 2plane output Chroma memory storing
style order (should be C_INT_OUT = 1)
bit MSB
00 Cr Cb Cr
3 3
01 Reserved
10 Reserved
11 Reserved
Reserved
1 = YCbCr 4:2:0 or 4:2:2 2plane output format
[3]
0 = YCbCr 4:2:0 or 4:2:2 3plane output format
1 = enable last IRQ at the end of frame capture (It is
recommended to check the done signal of capturing image for
[2]
JPEG)
0 = normal
YCbCr 4:2:2 1plane output memory storing style order.
bit MSB
00 Cr Y
1
01 Cb Y
1
10 Y Cr
3
11 Y Cb
3
Y Y Y Y Y Y Y Y ...
1 2 3 4 5 6 7 8
Cb Cb Cb Cb Cb Cb Cb
1 2 3 4 5 6
Cr Cr Cr Cr Cr Cr Cr
1 2 3 4 5 6 7
Figure 9.3-21 YCbCr Plane Memory Storing Style.
Description
LSB
Cb Cr Cb Cr Cb
2 2 1 1 0 0
LSB
Cb Y Cr Y Cb Y
3 1 2 0 1 0 0
Cr Y Cb Y Cr Y
3 1 2 0 1 0 0
Y Cb Y Cr Y Cb
1 2 1 1 0 0 0
Y Cr Y Cb Y Cr
1 2 1 1 0 0 0
YCbCr : 2 plane
Cb ...
7 8
Cr ...
YCbCr : 1 plane
8
S5PC100 USER'S MANUAL (REV1.0)
Reset
Value
0
0
0
0
0
0
Y Y Y Y Y Y Y Y ...
1 2 3 4 5 6 7 8
Cb Cr Cb Cr Cb Cr Cb
1 1 2 2 3 3
Y Cb Y Cr Y Cb Y Cr
1 1 2 1 3 2 4 2
M L
X X
O O
X X
O O
X X
O O
Cr ...
4 4
...