Samsung S5PC100 User Manual page 1167

CAMERA INTERFACE
8.34 Output DMA Cr Offset Register
CIOCROFF0, R/W, Address = 0xEE20_0170
CIOCROFF1, R/W, Address = 0xEE30_0170
CIOCROFF2, R/W, Address = 0xEE40_0170
CIOCROFFn Bit
Reserved [31]
OCROFF_V [30:16]
Reserved [15]
OCROFF_H [14:0]
8.35 Input DMA Y Offset Register (CIIYOFFn)
CIIYOFF0, R/W, Address = 0xEE20_0174
CIIYOFF1, R/W, Address = 0xEE30_0174
CIIYOFF2, R/W, Address = 0xEE40_0174
CIIYOFFn Bit
Reserved [31]
IYOFF_V [30:16]
Reserved [15]
IYOFF_H [14:0]
9.3-52
Reserved
Output DMA vertical offset for Cr component
Output format : YCbCr 3 plane → Cr height offset
Reserved
Output DMA horizontal offset for Cr component
Output format : YCbCr 3 plane → Cr width offset
Reserved
Input DMA vertical offset for Y component
Input format : YCbCr 2/3 plane → Y height offset
Input format : YCbCr 1 plane → YCbCr height offset
Input format : RGB → RGB height offset
Reserved
Input DMA horizontal offset for Y component
Input format : YCbCr 2/3 plane → Y width offset
Input format : YCbCr 1 plane → YCbCr width offset
Input format : RGB → RGB width offset
Description
Description
S5PC100 USER'S MANUAL (REV1.0)
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