Table 214. Rtc Register Map And Reset Values - ST STM32L4 5 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0351
38.6.21
RTC register map
Offset
Register
RTC_TR
0x00
Reset value
RTC_DR
0x04
Reset value
RTC_CR
0x08
Reset value
RTC_ISR
0x0C
Reset value
RTC_PRER
0x10
Reset value
RTC_WUTR
0x14
Reset value
RTC_ALRMAR
0x1C
Reset value
0
RTC_ALRMBR
0x20
Reset value
0
RTC_WPR
0x24
Reset value
RTC_SSR
0x28
Reset value
RTC_SHIFTR
0x2C
Reset value
0
RTC_TSTR
0x30
Reset value
RTC_TSDR
0x34
Reset value
RTC_TSSSR
0x38
Reset value

Table 214. RTC register map and reset values

0
YT[3:0]
0
0
OSE
[1:0]
0
0
0
1
DT
DU[3:0]
[1:0]
0
0
0
0
0
0
0
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
0
0
0
0
0
0
DocID024597 Rev 5
HT
HU[3:0]
MNT[2:0]
[1:0]
0
0
0
0
0
0
0
YU[3:0]
WDU[2:0]
0
0
0
0
0
0
0
0
L
0
0
0
0
0
0
0
0
0
0
PREDIV_A[6:0]
1
1
1
1
1
1
0
0
1
1
HT
HU[3:0]
MNT[2:0]
[1:0]
0
0
0
0
0
0
0
0
HT
HU[3:0]
MNT[2:0]
[1:0]
0
0
0
0
0
0
0
0
0
0
0
HU[3:0]
0
0
0
0
0
0
0
WDU[1:0]
0
0
0
0
Real-time clock (RTC)
MNU[3:0]
ST[2:0]
0
0
0
0
0
0
0
0
MU[3:0]
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PREDIV_S[14:0]
0
0
0
0
0
0
1
1
1
WUT[15:0]
1
1
1
1
1
1
1
1
1
MNU[3:0]
ST[2:0]
0
0
0
0
0
0
0
0
0
MNU[3:0]
ST[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
SS[15:0]
0
0
0
0
0
0
0
0
0
SUBFS[14:0]
0
0
0
0
0
0
0
0
0
MNU[3:0]
ST[2:0]
0
0
0
0
0
0
0
0
MU[3:0]
0
0
0
0
0
0
0
SS[15:0]
0
0
0
0
0
0
0
0
0
SU[3:0]
0
0
0
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
1
WUCKS
EL[2:0]
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
SU[3:0]
0
0
0
0
0
SU[3:0]
0
0
0
0
0
KEY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SU[3:0]
0
0
0
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
0
0
0
0
0
0
1229/1830
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