Rtc Interrupt Status Register (Rtc_Isr) - Freescale Semiconductor MCF52277 Reference Manual

Real-Time Clock
Address: 0xFC03_C010 (RTC_CR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Field
31–8 Reserved, must be cleared.
7 RTC enable. Enables/disables the real-time clock module. SWR has no effect on this bit.
EN 0 Disable the RTC
1 Enable the RTC
6–1 Reserved, must be cleared.
0 Software reset. Resets the module to its default state. However, a software reset has no effect on the EN bit.
SWR 0 No effect
1 Reset the module
26.3.6

RTC Interrupt Status Register (RTC_ISR)

The real-time clock interrupt status register (RTC_ISR) indicates the status of the various real-time clock
interrupts. When an event of the types included in this register occurs, then the bit is set in this register
regardless of its corresponding interrupt enable bit. These bits are cleared by writing a value of 1, which
also clears the interrupt. Interrupts may occur while the system clock is idle or in sleep mode.
Address: 0xFC03_C014 (RTC_ISR)
31 30 29
R 0 0
W
Reset 0 0
15 14 13
R SAM7 SAM6 SAM5 SAM4 SAM3 SAM2 SAM1 SAM0 2HZ
W w1c w1c w1c
Reset 0 0
26-6
Figure 26-6. RTC Control Register (RTC_CR)
Table 26-7. RTC_CR Field Descriptions
28 27 26
0 0 0 0
0 0 0 0
12 11 10
w1c w1c w1c
0 0 0 0
Figure 26-7. RTC Interrupt Status Register (RTC_ISR)
MCF52277 Reference Manual, Rev. 1
Description
25 24 23 22
0 0 0 0
0 0 0 0
9 8 7 6
0
w1c w1c w1c
0 0 0 0
Access: User read/write
8 7 6 5 4 3 2
0 0 0 0 0 0
EN
1 0 0 0 0 0 0
Access: User read/write
21 20 19 18
0 0 0 0
0 0 0 0
5 4 3 2
HR 1HZ DAY ALM
w1c w1c w1c w1c
0 0 0 0
Freescale Semiconductor
1 0
SWR
0
17 16
0 0
0 0
1 0
MIN SW
w1c w1c
0 0