These control and status signals are implemented on chip as registers within the chip-configuration module
(CCM) to minimize the pin-count on the device. With firmware, the system designer uses an external
device to manage the OTG functions to implement communications across the I
The OTG controller status register (UOCSR) implements as follows:
•
Writes to the UOCSR register from the firmware set the corresponding bits on the USB interface.
•
When the USB OTG module outputs change, the corresponding bits on the UOCSR register are
updated, and a maskable interrupt is generated.
The UOCSR register is documented in the CCM chapter, see
Status Register (UOCSR)."
Table 20-3. Internal Control and Status Bits for USB OTG Module
Signal
DP Pull-down
Enable
DM Pull-down
Enable
VBUS Charge
VBUS Discharge
DP Pull-up Enable
A Session Valid
B Session Valid
Session Valid
Session End
Wake-up Event
Freescale Semiconductor
Mnemonic
DPPD
Enables 15 kΩ resistor pull-down
on DP
DMPD
Enables 15 kΩ resistor pull-down
on DM
CRG_VBUS
Enables 8 mA pull-up to charge
VBUS.
DCR_VBUS
Enables 8 mA pull-down to
discharge VBUS.
DPPU
Enables the 1.5KΩ resistor pull-up
on DP
AVLD
Indicates a valid session level for A
device detected on VBUS.
BVLD
Indicates a valid session level for B
device detected on VBUS.
VVLD
Indicates valid operating level on
VBUS from USB device's
perspective.
SEND
Indicates VBUS fell below the
session valid threshold.
WKUP
Reflects when a wake-up event
occurred on the USB bus.
MCF52277 Reference Manual, Rev. 1
Universal Serial Bus Interface – On-The-Go Module
Section 9.3.6, "USB On-the-Go Controller
Direction
Comments
2
C bus or GPIO pins.
Interrupt
Trigger?
R
Y
R
Y
R
Y
R
Y
R
Y
R/W
N
R/W
N
R/W
N
R/W
N
R/W
Y
20-5