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Source
Port-D Keyboard Pin Interrupt
Port-F Keyboard Pin Interrupt
Phase-locked Loop Interrupt
(1) The I bit in the condition code register is a global mask for all interrupts sources except the SWI instruction.
(2) 0= highest priority
7.6.2.1 Interrupt Status Register 1
MC68HC(7)08KH12
Rev. 1.1
—
Freescale Semiconductor
Table 7-3. Interrupt Sources
Flag
KEYDF
KEYFF
PLLF
Address:
$FE04
Bit 7
6
Read:
IF6
IF5
Write:
R
R
Reset:
0
0
R
= Reserved
Figure 7-12. Interrupt Status Register 1 (INT1)
I
6–I
1 — Interrupt Flags 1–6
F
F
These flags indicate the presence of interrupt requests from the
sources shown in
1 = Interrupt request present
0 = No interrupt request present
Bit 0 and Bit 1 — Always read 0
INT
(1)
Register
Mask
Flag
IMASKD
IF9
IMASKF
IF10
PLLIE
IF11
5
4
IF4
IF3
R
R
0
0
Table
7-3.
(2)
Vector Address
Priority
9
$FFEA–$FFEB
10
$FFE8–$FFE9
11
$FFE6–$FFE7
3
2
1
IF2
IF1
0
R
R
R
0
0
0
Advance Information
Bit 0
0
R
0
77
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