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FlexCAN
It is the user's responsibility to ensure the bit time settings are in compliance
with the CAN standard. For bit time calculations, use an IPT (Information
Processing Time) of 2, which is the value implemented in the FlexCAN
module
Table 23-16. CAN Standard Compliant Bit Time Segment Settings
23.4
Initialization/Application Information
Initialization of the FlexCAN includes the initial configuration of the message buffers and configuration
of the CAN communication parameters following a reset, as well as any reconfiguration that may be
required during operation. The FlexCAN module may be reset in three ways:
•
Device level hard reset—resets all memory mapped registers asynchronously
•
Device level soft reset—resets some of the memory mapped registers synchronously (refer to
Table 23-1
to see which registers are affected by soft reset)
•
CANMCR[SOFT_RST] bit—has the same effect as the device level soft reset
Soft reset is synchronous and has to follow an internal request/acknowledge procedure across clock
domains. Therefore, it may take some time to fully propagate its effects. The CANMCR[SOFT_RST] bit
remains asserted while soft reset is pending, so software can poll this bit to know when the reset has
completed. Also, soft reset can not be applied while clocks are shut down in any of the low power modes.
The low power mode should be exited and the clocks resumed before applying soft reset.
The clock source, CANCTRL[CLK_SRC], should be selected while the module is in disable mode. After
the clock source is selected and the module is enabled (CANMCR[MDIS] bit cleared), the FlexCAN
automatically enters freeze mode. In freeze mode, the FlexCAN is un-synchronized to the CAN bus, the
CANMCR register's HALT and FRZ bits are set, the internal state machines are disabled, and the
CANMCR register's FRZ_ACK and NOT_RDY bits are set. The CANTX pin is in recessive state and the
FlexCAN does not initiate any transmission or reception of CAN frames. The message buffers are not
affected by reset, so they are not automatically initialized.
23-30
Time Segment 1
5 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
MCF52277 Reference Manual, Rev. 1
NOTE
Re-synchronization
Time Segment 2
2
3
4
5
6
7
8
Jump Width
1 .. 2
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
Freescale Semiconductor
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