Freescale Semiconductor MCF52277 Reference Manual page 604

Synchronous Serial Interface (SSI)
For the transmit section, the SSI_TMASK value is updated in the last time slot of frame 1 to mask the first
two time slots (0x3). This value takes effect at the next time slot and, consequently, the next frame
transmits data in the third time slot only.
For the receive section, data received on the SSI_RXD pin is transferred to the SSI_RX register at the end
of each time slot. If the FIFO is disabled, RDR flag sets and causes a receiver interrupt if the RE, RIE, and
SSI_IER[RDR] bits are set. If the FIFO is enabled, the RFF flag generates interrupts (this flag is set in
accordance with the watermark settings). In this example all time slots are enabled. The receive data ready
flag is set after reception of the first data (0x55). Because the flag is not cleared (Rx data register is not
read), the receive overrun error (ROE) flag is set on reception of the next data (0x5E). The ROE flag is
cleared by reading the SSI status register followed by reading the Rx data register.
MCF52277 Reference Manual, Rev. 1
25-36 Freescale Semiconductor