Freescale Semiconductor MCF52277 Reference Manual page 230

General Purpose I/O Module
14.3.5.7 Timer Pin Assignment Registers (PAR_TIMER)
The PAR_TIMER register controls the functions of the DMA timer pins.
Address: 0xFC0A_4037 (PAR_TIMER)
7
R
PAR_T3IN
W
Reset: 0
Field
7–6 DMA timer pin assignment. These bit fields configure the DMA timer pins for one of their primary functions or GPIO.
PAR_T3IN
5–4
PAR_T2IN
3–2
PAR_T1IN
1–0
PAR_T0IN
14.3.5.8 LCD Controller Control Pin Assignment Register (PAR_LCDCTL)
The PAR_LCDCTL register controls the functions of the LCDC control pins.
Address: 0xFC0A_4038 (PAR_LCDCTL)
7
R 0
W
Reset: 0
Field
7–5 Reserved, must be cleared.
4–3 LCD_ACD/OE pin assignment.
PAR_ACD_OE 00 LCD_ACD/OE pin configured as GPIO.
01 Reserved
10 LCD_ACD/OE pin configured for LCD_SPL_SPR function.
11 LCD_ACD/OE pin configured for LCD controller ACD/OE function.
14-20
6 5
PAR_T2IN
0 0
Figure 14-20. Timer Pin Assignment (PAR_TIMER)
Table 14-15. PAR_TIMER Field Descriptions
PAR_T3IN
00 GPIO
01 SSI_MCLK
10 T3OUT
11 T3IN
6 5
0 0
0 0
Figure 14-21. LCD Control Pin Assignment (PAR_LCDCTL)
Table 14-16. PAR_LCDCTL Field Descriptions
MCF52277 Reference Manual, Rev. 1
4 3
PAR_T1IN
0 0
Description
PAR_T2IN PAR_T1IN
GPIO GPIO
DSPI_PCS2 LCD_CONTRAST
T2OUT T1OUT
T2IN T1IN
4 3
PAR_ACD_OE
FLM_VSYNC
0 0
Description
Access: User read/write
2 1 0
PAR_T0IN
0 0 0
PAR_T0IN
GPIO
LCD_REV
T0OUT
T0IN
Access: User read/write
2 1
PAR_ PAR_
LP_HSYNC
0 0
Freescale Semiconductor
0
PAR_
LSCLK
0