Freescale Semiconductor MCF52277 Reference Manual page 384

Universal Serial Bus Interface – On-The-Go Module
Field
31–12 Base Address. These bits correspond to memory address signal [31:12]. Used only in the host mode
PERBASE
11–0 Reserved, must be cleared.
20.3.4.6 Device Address Register (DEVICEADDR)
This register is not defined in the EHCI specification. For device mode, the upper seven bits of this register
represent the device address. After any controller or USB reset, the device address is set to the default
address (0). The default address matches all incoming addresses. Software reprograms the address after
receiving a SET_ADDRESS descriptor.
The host and device mode functions share this register. In device mode, it is the DEVICEADDR register;
in host mode, it is the PERIODICLISTBASE register. See
Address Register (PERIODICLISTBASE),"
Address: 0xFC0B_0154 (DEVICEADDR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R
USBADR
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Field
31–25 Device Address. This field corresponds to the USB device address.
USBADR
24–0 Reserved, must be cleared.
20.3.4.7 Current Asynchronous List Address Register (ASYNCLISTADDR)
The ASYNCLISTADDR register contains the address of the next asynchronous queue head to executed
by the host.
The host and device mode functions share this register. In host mode, it is the ASYNCLISTADDR register;
in device mode, it is the EPLISTADDR register. See
(EPLISTADDR)," for more information.
Address: 0xFC0B_0158 (ASYNCLISTADDR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-22. Current Asynchronous List Address Register (ASYNCLISTADDR)
20-26
Table 20-24. PERIODICLISTBASE Field Descriptions
for more information.
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-21. Device Address Register (DEVICEADDR)
Table 20-25. DEVICEADDR Field Descriptions
ASYBASE
MCF52277 Reference Manual, Rev. 1
Description
Section 20.3.4.5, "Periodic Frame List Base
9
Description
Section 20.3.4.8, "Endpoint List Address Register
9
Access: User read/write
8 7 6 5 4 3 2 1
Access: User read/write
8 7 6 5 4 3 2 1
0 0 0 0 0
Freescale Semiconductor
0
0