Freescale Semiconductor MCF52277 Reference Manual page 231

Field
2 LCD_FLM/VSYNC pin assignment.
PAR_ 0 LCD_FLM/VSYNC pin configured as GPIO.
FLM_VSYNC 1 LCD_FLM/VSYNC pin configured for LCD controller FLM/VSYNC function.
1 LCD_LP/HSYNC pin assignment.
PAR_LP_HSYNC 0 LCD_LP/HSYNC pin configured as GPIO.
1 LCD_LP/HSYNC pin configured for LCD controller LP/HSYNC function.
0 LCD_LSCLK pin assignment.
PAR_LSCLK 0 LCD_LSCLK pin configured as GPIO.
1 LCD_LSCLK pin configured for LCD controller LSCLK function.
14.3.5.9 IRQ Pin Assignment Register (PAR_IRQ)
The PAR_IRQ register controls the functions of the IRQ pins.
Address: 0xFC0A_4039 (PAR_IRQ)
7
R 0
W
Reset: 0
Field
7–4 Reserved, must be cleared.
3–2 IRQ4 pin assignment.
PAR_IRQ4 00 IRQ4 pin configured as GPIO or external interrupt request 4 function as determined by the edge port module.
See Chapter 16, "Edge Port Module (EPORT),"
01 IRQ4 pin configured for DSPI PCS4 function
10 IRQ4 pin configured for DMA request 0 function
11 Reserved
1–0 IRQ1 pin assignment.
PAR_IRQ1 00 IRQ1 pin configured as GPIO or external interrupt request 1 function as determined by the edge port module.
See Chapter 16, "Edge Port Module (EPORT),"
01 IRQ1 pin configured for SSI_CLKIN function
10 IRQ1 pin configured for USB_CLKIN function
11 Reserved
Freescale Semiconductor
Table 14-16. PAR_LCDCTL Field Descriptions (continued)
6 5
0 0
0 0
Figure 14-22. IRQ Pin Assignment (PAR_IRQ)
Table 14-17. PAR_IRQ Field Descriptions
MCF52277 Reference Manual, Rev. 1
Description
4 3 2
0
PAR_IRQ4
0 0 0
Description
for details.
for details.
General Purpose I/O Module
Access: User read/write
1 0
PAR_IRQ1
0 0
14-21