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Interrupt Controller Modules
Field
31–0
Interrupt mask. Each bit corresponds to an interrupt source. The corresponding IMRHn bit determines whether an
INT_MASK
interrupt condition can generate an interrupt. The corresponding IPRHn bit reflects the state of the interrupt signal
even if the corresponding IMRHn bit is set.
0 The corresponding interrupt source is not masked
1 The corresponding interrupt source is masked
Address 0xFC04_800C (IMRL0)
0xFC04_C00C (IMRL1)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
R
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Field
31–0
Interrupt mask. Each bit corresponds to an interrupt source. The corresponding IMRLn bit determines whether an
INT_MASK
interrupt condition can generate an interrupt. The corresponding IPRLn bit reflects the state of the interrupt signal
even if the corresponding IMRLn bit is set.
0 The corresponding interrupt source is not masked
1 The corresponding interrupt source is masked
15.2.3
Interrupt Force Registers (INTFRCHn, INTFRCLn)
The INTFRCHn and INTFRCLn registers are each 32 bits in size and provide a mechanism to allow
software generation of interrupts for each possible source for functional or debug purposes. The system
design may reserve one or more sources to allow software to self-schedule interrupts by forcing one or
more of these bits (set to force request, clear to negate request) in the appropriate INTFRCn register. The
INTFRCLn register forces interrupts for sources 0 to 31, while the INTFRCHn register forces interrupts
for sources 32 to 63. The assertion of an interrupt request via the interrupt force register is not affected by
the interrupt mask register. The INTFRCn registers are cleared by reset.
Address 0xFC04_8010 (INTFRCH0)
0xFC04_C010 (INTFRCH1)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
R
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15-6
Table 15-5. IMRHn Field Descriptions
Figure 15-4. Interrupt Mask Register Low (IMRLn)
Table 15-6. IMRLn Field Descriptions
Figure 15-5. Interrupt Force Register High (INTFRCHn)
MCF52277 Reference Manual, Rev. 1
Description
INT_MASK
Description
INTFRCH
Access: User read/write
8
7
6
5
4
3
2
1
0
Access: User read/write
8
7
6
5
4
3
2
1
0
Freescale Semiconductor
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