Dspi Receive Fifo Registers 0–15 (Dspi_Rxfrn) - Freescale Semiconductor MCF52277 Reference Manual

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Address: 0xFC05_C03C (DSPI_TXFR0)
0xFC05_C040 (DSPI_TXFR1)
0xFC05_C044 (DSPI_TXFR2)
0xFC05_C048 (DSPI_TXFR3)
0xFC05_C04C (DSPI_TXFR4)
0xFC05_C050 (DSPI_TXFR5)
0xFC05_C054 (DSPI_TXFR6)
0xFC05_C058 (DSPI_TXFR7)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R
W
Reset 0
0
0
0
0
Field
31–16
Transmit command. Contains the command that sets the transfer attributes for the SPI data. See
TXCMD
"DSPI PUSH TX FIFO Register
15–0
Transmit data. Contains the SPI data to be shifted out.
TXDATA
29.3.9
DSPI Receive FIFO Registers 0–15 (DSPI_RXFRn)
The DSPI_RXFRn registers provide visibility into the RX FIFO for debugging purposes. Each register is
an entry in the RX FIFO. The DSPI_RXFR registers are read-only. Reading the DSPI_RXFRn registers
does not alter the state of the RX FIFO. The device uses 16 registers to implement the RX FIFO;
DSPI_RXFR0–15 are used.
Address: 0xFC05_C07C (DSPI_RXFR0)
0xFC05_C080 (DSPI_RXFR1)
0xFC05_C084 (DSPI_RXFR2)
0xFC05_C088 (DSPI_RXFR3)
0xFC05_C08C (DSPI_RXFR4)
0xFC05_C090 (DSPI_RXFR5)
0xFC05_C094 (DSPI_RXFR6)
0xFC05_C098 (DSPI_RXFR7)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R 0
0
0
0
0
W
Reset 0
0
0
0
0
Freescale Semiconductor
0xFC05_C05C (DSPI_TXFR8)
0xFC05_C060 (DSPI_TXFR9)
0xFC05_C064 (DSPI_TXFR10)
0xFC05_C068 (DSPI_TXFR11)
0xFC05_C06C (DSPI_TXFR12)
0xFC05_C070 (DSPI_TXFR13)
0xFC05_C074 (DSPI_TXFR14)
0xFC05_C078 (DSPI_TXFR15)
TXCMD
0
0
0
0
0
0
0
0
Figure 29-9. DSPI_TXFRn Register 0–15
Table 29-10. DSPI_TXFRn Field Descriptions
(DSPI_PUSHR)," for details on the command field.
0xFC05_C09C (DSPI_RXFR8)
0xFC05_C0A0 (DSPI_RXFR9)
0xFC05_C0A4 (DSPI_RXFR10)
0xFC05_C0A8 (DSPI_RXFR11)
0xFC05_C0AC (DSPI_RXFR12)
0xFC05_C0B0 (DSPI_RXFR13)
0xFC05_C0B4 (DSPI_RXFR14)
0xFC05_C0B8 (DSPI_RXFR15)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 29-10. DSPI_RXFRn Registers 0–15
MCF52277 Reference Manual, Rev. 1
0
0
0
0
0
0
0
0
Description
0
0
0
0
0
0
0
0
0
0
0
DMA Serial Peripheral Interface (DSPI)
Access: User read-only
9
8
7
6
5
4
3
TXDATA
0
0
0
0
0
0
0
0
Section 29.3.6,
Access: User read-only
9
8
7
6
5
4
3
RXDATA
0
0
0
0
0
0
0
0
2
1
0
0
0
0
2
1
0
0
0
0
29-19

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