Coldfire Bdm Command Format - Freescale Semiconductor MCF52277 Reference Manual

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Debug Module
32.5.3.1

ColdFire BDM Command Format

All ColdFire family BDM commands include a 16-bit operation word followed by an optional set of one
or more extension words.
15
14
13
Operation
Field
15–10
Specifies the command. These values are listed in
Operation
9
Reserved, must be cleared.
8
Direction of operand transfer.
R/W
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.
7–6
Operand Data Size for Sized Operations. Addresses are expressed as 32-bit absolute values. A command
Op Size
performing a byte-sized memory read leaves the upper 8 bits of the response data undefined. Referenced data is
returned in the lower 8 bits of the response.
5–4
Reserved, must be cleared.
3
Address/Data. Determines whether the register field specifies a data or address register.
A/D
0 Data register.
1 Address register.
2–0
Contains the register number in commands that operate on processor registers. See
Register
32.5.3.1.1
Extension Words as Required
Some commands require extension words for addresses and/or immediate data. Addresses require two
extension words because only absolute long addressing is permitted. Longword accesses are forcibly
longword-aligned and word accesses are forcibly word-aligned. Immediate data can be 1 or 2 words long.
Byte and word data each requires a single extension word, while longword data requires two extension
words.
Operands and addresses are transferred most-significant word first. In the following descriptions of the
BDM command set, the optional set of extension words is defined as address, data, or operand data.
32-24
12
11
10
9
0
Extension Word(s)
Figure 32-16. BDM Command Format
Table 32-21. BDM Field Descriptions
Operand Size
00
01
10
11
MCF52277 Reference Manual, Rev. 1
8
7
6
5
R/W
Op Size
0
Description
Table
32-20.
Bit Values
Byte
Word
Longword
Reserved
4
3
2
1
0
A/D
Register
8 bits
16 bits
32 bits
Table
32-22.
Freescale Semiconductor
0

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