Freescale Semiconductor MCF52277 Reference Manual page 562

Pulse-Width Modulation (PWM) Module
Left- or center-aligned output mode can be used in concatenated mode and is controlled by the low order
CAEn bit. The high order CAEn bit has no effect. The table shown below is used to summarize which
channels are used to set the various control bits when in 16-bit mode.
CONnn
CON67
CON45
CON23
CON01
24.3.2.8 PWM Boundary Cases
The following table summarizes the boundary conditions for the PWM regardless of the output mode (left-
or center-aligned) and 8-bit (normal) or 16-bit (concatenation):
24-20
Clock Source 7
High
PWMCNT6
Period/Duty Compare
Clock Source 5
High
PWMCNT4
Period/Duty Compare
Clock Source 3
High
PWMCNT2
Period/Duty Compare
Clock Source 1
High
PWMCNT0
Period/Duty Compare
Figure 24-20. PWM 16-Bit Mode
Table 24-15. 16-bit Concatenation Mode Summary
PWMEn PPOLn
PWM7 PPOL7
PWM5 PPOL5
PWME3 PPOL3
PWME1 PPOL1
MCF52277 Reference Manual, Rev. 1
Low
PWMCNT7
PWMOUT7
Low
PWMCNT5
PWMOUT5
Low
PWMCNT3
PWMOUT3
Low
PWMCNT1
PWMOUT1
PCLKn CAEn
PCLK7 CAE7
PCLK5 CAE5
PCLK3 CAE3
PCLK1 CAE1
PWMn
Output
PWMOUT7
PWMOUT5
PWMOUT3
PWMOUT1
Freescale Semiconductor