Asp Control Register (Asp_Cr) - Freescale Semiconductor MCF52277 Reference Manual

Touchscreen Controller/Analog-to-Digital Converter
Address
0xFC0A_8010 ASP Interrupt Status Register (ASP_ISR)
0xFC0A_8014 ASP Sample FIFO (ASP_SFIFO)
0xFC0A_8018 ASP FIFO Pointer (ASP_FIFOP)
0xFC0A_801C ASP Clock Divider Register (ASP_CLKDIV)
22.3.1

ASP Control Register (ASP_CR)

ASP_CR determines the configuration of touchscreen controller.
Address: 0xFC0A_8000 (ASP_CR)
31 30 29
R 0
ASPE
W
Reset 0 0
15 14 13
R
AZE CALA
W
Reset 0 0
Field
31 ASP conversion enable. Controls the ASP state machine to start/end the predefined operation sequence
ASPE according to other fields in ASP_CR. ASPE's effect on ASP operation depends on the timing before an
ADC_CLK rising edge and the current state of the ASP state machine. The ASP state machine operates on
ADC_CLK and must run in a proper sequence. The state machine ignores any ASPE changes during some
specific operations. To avoid this delay uncertainty, change the ASPE according to the typical operation
sequence, where an interrupt driven mechanism is used.
Besides explicitly clearing this bit, ASPE automatically clears if ASP_CR[PENE] is set and a pen-up interrupt
occurs in touchscreen non-manual modes. If the touchscreen is in auto mode and this bit is cleared, the state
machine goes into the next conversion state, but the start conversion control signal is blocked because the ASPE
is cleared. Therefore, the ADC conversion does not occur and no extra data is written into the FIFO.
If you clear this bit and set it again within a single ADC_CLK cycle, this short pulse is expanded to a longer pulse
so it is captured by the ASP.
0 Stop the sequence operation.
1 Initiate the sequence operation.
30–24 Reserved, must be cleared.
22-4
Table 22-2. ASP Memory Map (continued)
Register
28 27 26
0 0 0 0
0 0 0 0
12 11 10
0 0 0
AUTO
0 0 0 0
Figure 22-2. ASP Control Register (ASP_CR)
Table 22-3. ASP_CR Field Descriptions
MCF52277 Reference Manual, Rev. 1
Width
(bits)
32
32
32
32
25 24 23 22
0 0 0
DOZE
0 0 0 0
9 8 7 6
MODE
0 0 0 0
Description
Access Reset Value Section/Page
R/W 0x0000_0000 22.3.5/22-10
R See Section 22.3.6/22-11
R/W 0x0000_0000 22.3.7/22-12
R/W 0x0000_0029 22.3.8/22-13
Access: User read/write
21 20 19 18
0
PENE MDIS TSE
0 0 1 0
5 4 3 2
APTN
0 0 0 0
Freescale Semiconductor
17 16
TSTYPE
0 0
1 0
0 0