Freescale Semiconductor MCF52277 Reference Manual page 229

Field
15–14 UART1 pin assignment. These bit fields configure the UART1 pins for one of their primary functions or GPIO.
PAR_U1CTS
13–12
PAR_U1RTS
11–10
PAR_U1RXD
9–8
PAR_U1TXD
7–6 UART0 pin assignment. These bit fields configure the UART0 pins for one of their primary functions or GPIO.
PAR_U0CTS
5–4
PAR_U0RTS
3–2
PAR_U0RXD
1–0
PAR_U0TXD
14.3.5.6 DSPI Pin Assignment Register (PAR_DSPI)
The PAR_DSPI register controls the functions of the DSPI pins.
Address: 0xFC0A_4036 (PAR_DSPI)
7
R
PAR_PCS0
W
Reset: 0
Field
7–6 DSPI pin assignment. These bit fields configure the DSPI pins for one of their primary functions or GPIO.
PAR_PCS0
5–4
PAR_SIN
3–2
PAR_SOUT
1–0
PAR_SCK
Freescale Semiconductor
Table 14-13. PAR_UART Field Descriptions
PAR_U1CTS PAR_U1RTS PAR_U1RXD PAR_U1TXD
00 GPIO
01 LCD_CLS
10 SSI_BCLK
11 U1CTS
PAR_U0CTS
00 GPIO
01 USB_VBUS_EN USB_VBUS_OC
10 T1OUT
11 U0CTS
6 5
PAR_SIN
0 0
Figure 14-19. DSPI Pin Assignment Register (PAR_DSPI)
Table 14-14. PAR_DSPI Field Descriptions
PAR_PCS0
00 GPIO
01 Reserved
10 U2RTS
11 DSPI_PCS0
MCF52277 Reference Manual, Rev. 1
Description
GPIO GPIO
LCD_PS Reserved
SSI_FS SSI_RXD
U1RTS U1RXD
PAR_U0RTS PAR_U0RXD
GPIO GPIO
Reserved
T1IN CANRX
U0RTS U0RXD
4 3
PAR_SOUT
0 0
Description
PAR_SIN PAR_SOUT
GPIO GPIO
Reserved Reserved
U2RXD U2TXD
DSPI_SIN DSPI_SOUT
General Purpose I/O Module
GPIO
Reserved
SSI_TXD
U1TXD
PAR_U0TXD
GPIO
Reserved
CANTX
U0TXD
Access: User read/write
2 1 0
PAR_SCK
0 0 0
PAR_SCK
GPIO
Reserved
U2CTS
DSPI_SCK
14-19