Freescale Semiconductor MCF52277 Reference Manual page 689

Push TX FIFO
Register
29.5.5.1 Address Calculation for the First-in and Last-in Entries in the TX FIFO
The memory address of the first-in entry in the TX FIFO is computed by the following equation:
First-in entry address = TXFIFO base + 4 × (TXNXTPTR)
The memory address of the last-in entry in the TX FIFO is computed by the following equation:
Last-in entry address = TX FIFO base + 4 × [(TXCTR + TXNXTPTR - 1) modulo TX FIFO depth]
where:
TX FIFO base: base address of TX FIFO
TXCTR: TX FIFO counter
TXNXTPTR: transmit next pointer
TX FIFO depth: 16
29.5.5.2 Address Calculation for the First-in and Last-in Entries in the RX FIFO
The memory address of the first-in entry in the RX FIFO is computed by the following equation:
First-in entry address = TX FIFO base + 4 × (POPNXTPTR)
The memory address of the last-in entry in the RX FIFO is computed by the following equation:
Last-in entry address = RX FIFO base + 4 × [(RXCTR + POPNXTPTR - 1) modulo RX FIFO
depth]
RX FIFO base: base address of RX FIFO
RXCTR: RX FIFO counter
POPNXTPTR: pop next pointer
RX FIFO depth: 16
Freescale Semiconductor
TX FIFO Base
–
–
Entry A (First In)
Entry B
Entry C
Entry D (Last In)
–
–
+ 1 TX FIFO Counter
Figure 29-23. TX FIFO Pointers and Counter
MCF52277 Reference Manual, Rev. 1
DMA Serial Peripheral Interface (DSPI)
Transmit Next
Data Pointer
(TXNXTPTR)
Shift Register
– 1
DSPI_SOUT
29-39