Freescale Semiconductor MCF52277 Reference Manual page 475

LCD_FLM
LCD_LP
LCD_LP
LCD_LSCLK
LCD_D7
LCD_D6
LCD_D5
LCD_D4
LCD_D3
LCD_D2
LCD_D1
LCD_D0
Figure 21-37. LCDC Interface Timing for 8-bit Data Passive Matrix Color Panels
21.4.9.3 Passive Panel Interface Timing
Figure 21-38 shows the horizontal timing (timing of one line), including the line pulse (LCD_LP) and the
data. The width of LCD_LP and delays before and after LCD_LP are programmable.
The parameters used for panel interface timing are:
• XMAX (X size) defines the number of pixels per line. XMAX is the total number of pixels per line.
• H_WAIT_1 defines the delay from the end of data output to the beginning of LCD_LP.
• H_WIDTH (horizontal sync pulse width) defines the width of the LCD_FLM pulse, and
H_WIDTH must be at least 1.
• H_WAIT_2 defines the delay from the end of LCD_LP to the beginning of data output.
All parameters are defined in unit of pixel clock period
unless stated otherwise.
Freescale Semiconductor
LINE 1 LINE 2 LINE 3
1 2 3
R[0,0] B[0,2] G[0,5]
G[0,0] R[0,3] B[0,5]
B[0,0] G[0,3] R[0,6]
R[0,1] B[0,3] G[0,6]
G[0,1] R[0,4] B[0,6]
B[0,1] G[0,4] R[0,7]
R[0,2] B[0,4] G[0,7]
G[0,2] R[0,5] B[0,7]
NOTE
MCF52277 Reference Manual, Rev. 1
Liquid Crystal Display Controller (LCDC)
LINE 4 LINE n
89 90
B[0,234] G[0,237]
R[0,235] B[0,237]
G[0,235] R[0,238]
B[0,235] G[0,238]
R[0,236] B[0,238]
G[0,236] R[0,239]
B[0,236] G[0,239]
R[0,237] B[0,239]
LCD_PCR[PCD]
⎛
-------------------------------------------------- -
⎝
LINE 1
3*m/8-1 3*m/8
B[0,m-6] G[0,m-3]
R[0,m-5] B[0,m-3]
G[0,m-5] R[0,m-2]
B[0,m-5] G[0,m-2]
R[0,m-4] B[0,m-2]
G[0,m-4] R[0,m-1]
B[0,m-4] G[0,m-1]
R[0,m-3] B[0,m-1]
+ 1
⎞
⎠
f
sys/2
21-39