Freescale Semiconductor MCF52277 Reference Manual page 754

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Debug Module
Field
20–18
Enable Level 2 Address Breakpoint. Setting an L2EA bit enables the corresponding address breakpoint. Clearing all
L2EA
three bits disables the breakpoint.
17
Enable Level 2 Pc Breakpoint.
L2EPC
0 Disable PC breakpoint
1 Enable PC breakpoint where the trigger is defined by the logical summation of:
16
Level 2 PC Breakpoint Invert.
L2PCI
0 The PC breakpoint is defined within the region defined by PBRn and PBMR.
1 The PC breakpoint is defined outside the region defined by PBRn and PBMR.
15
Level 2 Trigger. Determines the logic operation for the trigger between the PC_condition and the (Address_range &
L2T
Data_condition) where the inclusion of a Data_condition is optional. The ColdFire debug architecture supports the
creation of single or double-level triggers.
0 Level 2 trigger = PC_condition & Address_range & Data_condition
1 Level 2 trigger = PC_condition | (Address_range & Data_condition)
Note: Debug Rev A only had the AND condition available for the triggers.
14
Level 1 Trigger. Determines the logic operation for the trigger between the PC_condition and the (Address_range &
L1T
Data_condition) where the inclusion of a Data_condition is optional. The ColdFire debug architecture supports the
creation of single or double-level triggers.
0 Level 1 trigger = PC_condition & Address_range & Data_condition
1 Level 1 trigger = PC_condition | (Address_range & Data_condition)
Note: Debug Rev A only had the AND condition available for the triggers.
13
Enable Level 1 Breakpoint. Global enable for the breakpoint trigger.
L1EBL
0 Disables all level 1 breakpoints
1 Enables all level 1 breakpoint triggers
32-14
Table 32-9. TDR Field Descriptions (continued)
TDR Bit
20
Address breakpoint inverted. Breakpoint is based outside the
range between ABLR and ABHR.
19
Address breakpoint range. The breakpoint is based on the
inclusive range defined by ABLR and ABHR.
18
Address breakpoint low. The breakpoint is based on the
address in the ABLR.
(PBR0 & PBMR) | PBR1 | PBR2 | PBR3
MCF52277 Reference Manual, Rev. 1
Description
Description
Eqn. 32-1
Freescale Semiconductor

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