Introduction - Freescale Semiconductor MCF52277 Reference Manual

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Chapter 7
Clock Module
7.1

Introduction

The clock module allows the device to be configured for one of several clocking methods. Clocking modes
include internal phase-locked loop (PLL) clocking with an external clock reference or an external crystal
reference supported by an internal crystal amplifier. The PLL can also be disabled, and an external
oscillator can directly clock the device. The clock module contains:
Crystal amplifier and oscillator (OSC)
Phase-locked loop (PLL)
Status and control registers
Control logic
Throughout this manual, f
the internal bus frequency.
Figure 7-1
is a high-level representation of clock connections. The exact functionality of the blocks is not
illustrated (SBF controls many configuration options, clocks to the SDRAMC controller are disabled when
the device is in limp mode, and the clocks to individual modules may be disabled via the peripheral power
management registers as described in
Freescale Semiconductor
NOTE
refers to the core frequency and f
sys
Chapter 8, "Power
Management").
MCF52277 Reference Manual, Rev. 1
refers to
sys/2
7-1

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