Freescale Semiconductor MCF52277 Reference Manual page 224

General Purpose I/O Module
The PPDSDR_x registers are read/write. At reset, the bits in the PPDSDR_x registers are set to the current
pin states. Reading a PPDSDR_x register returns the current state of the port x pins. Setting a PPDSDR_x
register sets the corresponding bits in the PODR_x register. Writing 0s has no effect.
Address: 0xFC0A_401D (PPDSDR_UART)
0xFC0A_4022 (PPDSDR_LCDDATAM)
0xFC0A_4023 (PPDSDR_LCDDATAL)
7
R
W
Reset: [Px7]
Address: 0xFC0A_4018 (PPDSDR_BE)
0xFC0A_4019 (PPDSDR_CS)
0xFC0A_401A (PPDSDR_FBCTL)
0xFC0A_401E (PPDSDR_DSPI)
0xFC0A_401F (PPDSDR_TIMER)
0xFC0A_4020 (PPDSDR_LCDCTL)
7
R 0
W
Reset: 0
Address: 0xFC0A_401B (PPDSDR_I2C)
0xFC0A_4021 (PPDSDR_LCDDATAH)
7
R 0
W
Reset: 0
Field
PPDR_x Port x pin data bits.
(read) 0 Port x pin state is 0
1 Port x pin state is 1
PSDR_x Port x set data bits.
(write) 0 No effect.
1 Set corresponding PODR_x bit.
Note: See above figures for bit field positions.
14-14
6 5
[Px6] [Px5]
Figure 14-8. Port x Pin Data/Set Data Registers (PPDSDR_x)
6 5
0 0
0 0
Figure 14-9. Port x Pin Data/Set Data Registers (PPDSDR_x)
6 5
0 0
0 0
Figure 14-10. Port x Pin Data/Set Data Registers (PPDSDR_x)
Table 14-7. PPDSDR_x Field Descriptions
MCF52277 Reference Manual, Rev. 1
4 3
PPDR_x
PSDR_x
[Px4] [Px3] [Px2]
4 3
0
0 [Px3] [Px2]
4 3
0 0
0 0
Description
Access: User read/write
2 1 0
[Px1] [Px0]
Access: User read/write
2 1 0
PPDR_x
PSDR_x
[Px1] [Px0]
Access: User read/write
2 1 0
0 PPDR_x
PSDR_x
0 [Px1] [Px0]
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