Miscellaneous Instruction Execution Times - Freescale Semiconductor MCF52277 Reference Manual

ColdFire Core
3.3.5.5

Miscellaneous Instruction Execution Times

Opcode <EA>
CPUSHL (Ax)
LINK.W Ay,#imm
MOVE.L Ay,USP
MOVE.L USP,Ax
MOVE.W CCR,Dx
MOVE.W <ea>,CCR
MOVE.W SR,Dx
MOVE.W <ea>,SR
MOVEC Ry,Rc
MOVEM.L <ea>,&list
MOVEM.L &list,<ea>
NOP
PEA <ea>
PULSE
STLDSR #imm
STOP #imm
TRAP #imm
TPF
TPF.W
TPF.L
UNLK Ax
WDDATA <ea>
WDEBUG <ea>
1
The n is the number of registers moved by the MOVEM opcode.
2
If a MOVE.W #imm,SR instruction is executed and imm[13] equals 1, the execution time is 1(0/0).
3
The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.
4
PEA execution times are the same for (d16,PC).
5
PEA execution times are the same for (d8,PC,Xn*SF).
3-30
Table 3-16. Miscellaneous Instruction Execution Times
Rn (An) (An)+
— 11(0/1) —
2(0/1) — —
3(0/0) — —
3(0/0) — —
1(0/0) — —
1(0/0) — —
1(0/0) — —
7(0/0) — —
9(0/1) — —
— 1+n(n/0) —
— 1+n(0/n) —
3(0/0) — —
— 2(0/1) —
1(0/0) — —
— — —
— — —
— — —
1(0/0) — —
1(0/0) — —
1(0/0) — —
2(1/0) — —
— 3(1/0) 3(1/0)
— 5(2/0) —
MCF52277 Reference Manual, Rev. 1
Effective Address
-(An) (d16,An) (d8,An,Xn*SF)
— —
— —
— —
— —
— —
— —
— —
— —
— —
— 1+n(n/0)
— 1+n(0/n)
— —
4
— 2(0/1) 3(0/1)
— —
— —
— —
— —
— —
— —
— —
— —
3(1/0) 3(1/0) 4(1/0)
— 5(2/0)
xxx.wl #xxx
— — —
— — —
— — —
— — —
— — —
— — 1(0/0)
— — —
— — 7(0/0)
— — —
— — —
— — —
— — —
5
2(0/1) —
— — —
— — 5(0/1)
— — 3(0/0)
— — 15(1/2)
— — —
— — —
— — —
— — —
3(1/0) —
— — —
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