FlexBus
FB_CSn, FB_OE,
FB_BE/BWEn
18.4.5.2
Basic Write Bus Cycle
During a write cycle, the device sends data to memory or to a peripheral device.
write cycle flowchart.
1. Set FB_R/W to write.
2. Place address on FB_D[23:0].
3. Assert FB_TS.
1. Negate FB_TS.
2.
Assert FB_CSn.
3.
Drive data.
FlexBus asserts internal FB_TA
1.
(auto acknowledge/internal termination).
2.
Sample FB_TA low.
1. Start next cycle.
18-14
S0
FB_CLK
FB_A[23:0]
FB_D[31:X]
ADDR[31:X]
FB_R/W
FB_TS
FB_TA
Figure 18-7. Basic Read-Bus Cycle
ColdFire device
Figure 18-8. Write-Cycle Flowchart
MCF52277 Reference Manual, Rev. 1
S1
S2
ADDR[23:0]
DATA
1. Decode address.
1. Select the appropriate slave device.
2. Latch data on FB_D[31:X].
3.
Assert FB_TA (external termination).
1. Negate FB_TA (external termination).
S3
S0
Figure 18-8
System
Freescale Semiconductor
shows the